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Institution:
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Temple University
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Subject:
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Description:
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This course considers the design and implementation of data communication for computer systems. Parallel bus architectures and serial data protocols are implemented in simulation using the Verilog hardware description language and behavioral synthesis using the programmable gate array. Topics include: the PC/104+, Multibus and VME parallel buses, the SPI, I2C, USB, Firewire, MIL-STD-1553B serial buses and the performance of error correction and routing for protocols for wired and wireless communication.
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Credits:
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3.00
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Credit Hours:
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Prerequisites:
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C+IN SC 1057 (C071)
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Corequisites:
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EE 4512 (0300)
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Exclusions:
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Level:
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Instructional Type:
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Lecture
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Notes:
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Additional Information:
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Historical Version(s):
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Institution Website:
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Phone Number:
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(215) 204-7000
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Regional Accreditation:
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Middle States Association of Colleges and Schools
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Calendar System:
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Semester
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