EE 449 - Analog Integrated Circuit Layout

Institution:

University at Buffalo

Subject:

Description:

Credits: 3 Prerequisites: EE 311 Corequisites: None Type: LEC Introduces analog integrated circuit fabrication and layout design for analog VLSI. Covers: representative IC fabrication processes (standard bipolar, CMOS and analog BiCMOS); layout principles and methods for MOS transistors and device matching; resistors and capacitors layout; matched layouts of R and C components; bipolar transistors and bipolar matching; and diodes. Also reviews several active-loaded analog amplifier circuits, focusing on CMOS and BiCMOS op amp configuration. Requires a term project on the layout design of simple op amp circuits involving CMOS or BiCMOS op amps plus several matched devices of resistors, capacitors and transistors. Students design circuits using SPICE simulations. The student term project is to be fabricated through MOSIS.

Credits:

3.00

Credit Hours:

Prerequisites:

Corequisites:

Exclusions:

Level:

Instructional Type:

Lecture

Notes:

Additional Information:

Historical Version(s):

Institution Website:

www.buffalo.edu

Phone Number:

(716) 645-2000

Regional Accreditation:

Middle States Association of Colleges and Schools

Calendar System:

Semester

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