EET 3730L - Logic Systems Design Lab

Institution:

Youngstown State University

Subject:

Electrical Engineering Tech

Description:

3730L. Logic Systems Design Lab. Laboratory exercises dealing with applications of concepts developed in EET 3730. Three hours per week. Concurrent with EET 3730. 0 s.h.

Credits:

0.00

Credit Hours:

Prerequisites:

Corequisites:

EET 3730

Exclusions:

Level:

Instructional Type:

Lab

Notes:

Additional Information:

Historical Version(s):

Institution Website:

web.ysu.edu/home

Phone Number:

(877) 468-6978

Regional Accreditation:

North Central Association of Colleges and Schools

Calendar System:

Semester

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