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Institution:
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University of Hartford
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Subject:
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Description:
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This class uses VHDL for design, synthesis, simulation, and modeling. Students will learn how to write VHDL models that can be automatically synthesized into integrated circuits, such as FPGA. The use of software and hardware is an essential part of the course. Prerequisite: ECE 231. Laboratory fee.
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Credits:
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3.00
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Credit Hours:
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Prerequisites:
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Corequisites:
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Exclusions:
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Level:
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Instructional Type:
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Lecture
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Notes:
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Additional Information:
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Historical Version(s):
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Institution Website:
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Phone Number:
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(860) 768-4100
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Regional Accreditation:
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New England Association of Schools and Colleges
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Calendar System:
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Semester
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