EE 304 - Digital Design I

Institution:

Capitol Technology University

Subject:

Description:

Minimization of Boolean functions using Kamaugh Maps and Quine-McCluskey Tabulation. Multilevel circuits: PLAs, PALs, gate arrays. Combinational logic design with MSI LSI. Chip count reduction. Sequential circuit analysis and design. State tables and state diagrams. Asynchronous circuit design. Introduction to PAL design software. Students design, simulate and build circuits. Design using programmable devices. Prerequisite: EL-204.

Credits:

3.00

Credit Hours:

Prerequisites:

Corequisites:

Exclusions:

Level:

Instructional Type:

Multiple

Notes:

Additional Information:

Historical Version(s):

Institution Website:

www.capitol-college.edu

Phone Number:

(301) 369-2800

Regional Accreditation:

Middle States Association of Colleges and Schools

Calendar System:

Semester

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