ITEL 338 - Digital Logic Lab

Institution:

Jackson State University

Subject:

Description:

Prerequisite: ITE 111 & 112. A laboratory course which covers logic OR gate, logic NOT, AND gate, integrated circuit gates, half-adder circuit full-adder circuit, colpitt: Oscillator, and Kamaugh map, and triggered monostable multivigrator. (S)

Credits:

1.00

Credit Hours:

Prerequisites:

Corequisites:

Exclusions:

Level:

Instructional Type:

Lecture

Notes:

Additional Information:

Historical Version(s):

Institution Website:

www.jsums.edu

Phone Number:

(601) 979-2121

Regional Accreditation:

Southern Association of Colleges and Schools

Calendar System:

Semester

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