CPE 315 - Synthesis with Hardware Descriptive Language

Institution:

Jackson State University

Subject:

Description:

Prerequisites: EN 212, ENL 212, and CSC 118. This course provides an overview of digital logic design. It covers modeling and simulation of basic digital systems using a hardware descriptive language. Topics include behavioral, data flow, and structural modeling.

Credits:

3.00

Credit Hours:

Prerequisites:

Corequisites:

Exclusions:

Level:

Instructional Type:

Lecture

Notes:

Additional Information:

Historical Version(s):

Institution Website:

www.jsums.edu

Phone Number:

(601) 979-2121

Regional Accreditation:

Southern Association of Colleges and Schools

Calendar System:

Semester

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