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Institution:
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California State University-Fresno
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Subject:
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Description:
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Prerequisite: ECE 85 or equivalent. Synchronous machines; finite and nonfinite state machine design and analysis; Mealy-Moore state models; modulo and shift-register counters; state minimization and assignment techniques; incompletely specified sequential machines; one-hot design; algorithmic state machine design; introduction to CAD tools using the Verilog HDL for design entry, synthesis, simulation, and physical design. Implementation will include CPLDs and FPGAs.
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Credits:
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4.00
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Credit Hours:
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Prerequisites:
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Corequisites:
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Exclusions:
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Level:
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Instructional Type:
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Lecture
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Notes:
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Additional Information:
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Historical Version(s):
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Institution Website:
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Phone Number:
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(559) 278-4240
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Regional Accreditation:
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Western Association of Schools and Colleges
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Calendar System:
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Semester
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